Chenghong Zhu, Xian Wu, Zhaohui Yang, Jingbo Wang, Anbang Wu, Shenggen Zheng, Xin Wang

Quantum hardware development is progressing rapidly with substantial advancements achieved across leading platforms, including superconducting circuits, trapped-ion systems, and neutral atom arrays. As the pursuit of practical quantum advantage continues, efficient quantum program compilation becomes essential for transforming high-level representations of quantum algorithms into physically executable circuits. A fundamental challenge in this process is qubit mapping and gate scheduling, which play a critical role in adapting compiled circuits to the architectural constraints and physical limitations of specific quantum hardware. In this survey, we systematically review and categorize research on the qubit mapping and routing problems across the three mainstream quantum hardware platforms. We primarily explore the development of hardware-aware compilers for superconducting platforms, classifying existing methods into solver-based, heuristic-based, and machine learning-based approaches, and analyze their optimization targets, including gate count, circuit duration, fidelity, and scalability. Furthermore, we examine the evolution of trapped-ion and neutral atom devices, analyzing the distinct challenges posed by their hardware characteristics and highlighting specialized compilers tailored to these unique physical constraints. Finally, we summarize the key challenges and identify some promising opportunities for future research in quantum compiler design across these hardware platforms.